First pass yield (FPY) is the percentage of units that pass all inspection and test operations on the first attempt, without rework, touch-up or retest. It is the single most useful indicator of whether a manufacturing process is genuinely under control, because it cannot be improved by inspection — only by fixing the process that produced the defect. A high FPY means the process is stable; a low FPY means defects are being found and corrected downstream, which adds cost, handling and reliability risk without appearing on the invoice.
The problem is that FPY is computed differently at different factories, which makes supplier-to-supplier comparison unreliable unless you define the terms first. This guide covers the definitions that matter, realistic benchmark ranges by product class, and a practical method for diagnosing where yield is being lost on your specific assembly. Huaxing PCBA reports FPY per process step and per product, with the underlying defect Pareto available to customers.
Why the Same Number Means Different Things
Before comparing FPY figures, establish which of these definitions the supplier is using. The differences are large enough to move a reported number by several percentage points.
Unit-based versus opportunity-based
Unit-based yield counts boards: a panel with 400 components where one component is misplaced still counts as a single failed unit. This is the buyer-relevant number, because it mirrors what you receive. Opportunity-based yield, sometimes expressed in defects per million opportunities (DPMO), normalises by solder joint count and is a better measure of process maturity — but it will always produce a more flattering figure than unit yield. Ask which one is being quoted.
Which operations are included
Does "first pass" cover SMT assembly only, or does it include final functional test and box build? A supplier quoting SMT-only FPY and another quoting FPY through final assembly are describing different stages. The number that matters to you is the one covering every operation the supplier performs, because that is what determines how many units arrive conforming.
Rework counted or excluded
A board that fails AOI, is reworked and then passes is a first-pass failure. Some reporting systems count it as a pass because it eventually met specification. Confirm explicitly that reworked and retested units are counted as failures — otherwise the metric measures inspection effectiveness, not process control. The rework and repair guide explains why rework volume is itself a reliability concern.
Sample or full population
A figure based on a pilot run of 50 boards is not the same as one from six months of production. Ask for the lot size and the date range behind any quoted number, and prefer a rolling figure from recent, volume production over a best-case historical result.
Key Takeaway: Write the FPY definition into the quality agreement: units, all operations through final test, reworked and retested units counted as failures, reported monthly from full production. That single sentence removes most of the ambiguity in supplier comparison.
Benchmark Ranges by Product Class
Absolute yield expectations depend heavily on complexity. A board with 200 chip components and a wide pitch has a fundamentally different capability profile from a 32-layer board carrying 0.3 mm pitch BGAs with 3000 joints. Benchmarks are only meaningful within a class.
| Assembly Class | Typical FPY Range | Mature Process Target | Main Loss Driver |
|---|---|---|---|
| Coarse pitch, 0603+ components | 98.5 – 99.7% | > 99.5% | Print defects, placement errors |
| Standard SMT, 0402 & 0.5 mm pitch | 97 – 99% | > 98.5% | Fine-pitch bridging and opens |
| Mixed technology with through-hole | 96 – 98.5% | > 98% | Selective solder and hole fill |
| Area array (BGA / CSP), high density | 95 – 98.5% | > 98% | Voiding, warpage, head-in-pillow |
| Complex automotive / medical class 3 | 94 – 98% | > 97% | Thermal mass, MSD handling, wetting |
Two cautions apply to any benchmark table. First, a low FPY at a complex class can still be a better process than a high FPY at a simple one — always compare within class. Second, a supplier reporting a very high figure for a complex class without rework data may be excluding reworked units. The DPPM and quality metric benchmarks guide covers the complementary defect-rate view, and the AQL sampling guide explains how incoming inspection verifies the claim.
Diagnosing Where Yield Is Lost
When FPY is below target, the productive response is not to push harder on final inspection — it is to localise the loss. The five-step method below follows the process flow in reverse, because the latest operation is usually the cheapest to correct first, and it identifies whether the root cause is upstream.
Get the defect Pareto by operation, not by product
The first question is where defects are detected, not what they are. Split failures across printing, placement, reflow, AOI, X-ray and electrical test. A factory where 70% of failures appear at electrical test but only 5% at AOI has a test-coverage or test-fixture problem rather than a soldering problem. The electrical test method comparison covers how coverage differs between approaches.
Establish whether losses are systematic or random
Check whether failures cluster on particular panels, particular board positions, or particular shifts. Clustering on position means a tooling or support issue. Clustering on time means a consumable or material issue — paste ageing, stencil wear, a feeder running low. Uniformly distributed failures point at a design or tolerance interaction instead.
Check the printing step first, always
Because printing causes the majority of SMT defects, printing data should be examined before placement or reflow. Pull the SPI results for the affected lots and look at volume and transfer efficiency by aperture class. The SPI process control guide explains the metrics and the limits to apply.
Correlate to design features before blaming the process
Many persistent yield losses are design-driven: inadequate thermal relief on a ground pad, a land pattern that violates area ratio limits, insufficient clearance for the reflow profile, or components whose moisture sensitivity was not respected. Cross-reference the defect locations against the layout. The shift-left DFM verification guide shows how to catch these before tooling is cut.
Verify the measurement system itself
An AOI programme with sensitivity set too high generates false calls that depress reported FPY without any real defect existing, while a programme set too low misses defects and inflates it. Ask when the AOI programme was last validated against a known-defect sample and how false-call rate is tracked. The inspection methods guide covers the interaction between the three stages.
Procurement tip: When you receive a monthly FPY report, request the accompanying defect Pareto by operation and the top three corrective actions taken. A supplier with real process control can answer immediately. A supplier who reports only the headline percentage has the number without the system behind it.
Yield, Cost and What FPY Actually Buys You
FPY matters commercially because the cost of a defect rises steeply as it moves downstream. A paste defect caught at SPI costs a stencil wipe. The same defect caught at AOI costs a rework cycle, handling and a re-inspection. Caught at final functional test it may cost a full diagnostic teardown. Caught by your customer it costs a returned shipment, a containment action and the relationship. This escalation is why yield improvement at the earliest process step has the best return, and why a supplier investing in SPI and process capability is not spending money on inspection so much as avoiding cost. The total cost of ownership guide quantifies the escalation across a product programme.
It also connects directly to delivery performance. Rework consumes line capacity that was planned for new production, so a factory running at 94% FPY on a complex product has materially less effective capacity than the machine count suggests. The SMT line capacity planning guide covers how rework and changeover erode real throughput, and the quality dispute resolution guide covers what to do contractually when yield falls below the agreed threshold.
Summary / Next Steps
First pass yield is a powerful metric only when its definition is pinned down. Specify units, all operations through final test, rework counted as failure, and monthly reporting from production. Benchmark within product class rather than against an absolute. And when yield disappoints, diagnose from the defect Pareto by operation outward — checking printing first, then design interactions, then the measurement system — rather than adding inspection at the end of the line.
At Huaxing PCBA, yield is reported per process step and per product from a line running 8 SMT lines, 4 DIP lines and full AOI, X-ray, SPI, ICT and functional test coverage, under an IATF 16949 and ISO 9001 quality system. Customers receive the FPY report and defect Pareto alongside their shipment data, and the corrective action log on request. Send your Gerber and BOM for a DFM review and a manufacturing plan within 24 hours.
