New energy PCB manufacturing — EV charger, solar inverter, BESS

Industries / New Energy

Power the
Energy Transition.

350kW EV chargers switching SiC at 50kHz. 1500V string inverters in desert solar farms. Megawatt-hour BESS containers with 1000VDC bus. Heavy copper to 12oz, 4kV HiPot isolation, IGBT/SiC power stages, from a manufacturer that understands power electronics.

12ozMax Copper Weight
4kVHiPot Isolation
1500VDCWorking Voltage
-40/+125°COperating Range
Heavy Copper 12oz
4kV HiPot Isolation
1500VDC Solar Ready
100% AOI + X-Ray
Metal-Core / Polyimide
UL E354321

Power Electronics. Engineered for Extremes.

6-12oz

Heavy Copper Power

6oz inner layers standard for power distribution, 10-12oz for EV charger output stages. 50mm-wide 10oz trace carries 200A continuous with 20°C rise. Selective heavy copper reduces cost ~40% vs. all-layer.

4kV

HiPot Isolation

400V to 1500V working voltage designs. Creepage/clearance per IEC 60664 at Pollution Degree 3. Isolation slots with post-routing debris wash. HiPot verification on 100% of production boards.

1-3 W/m·K

Metal-Core PCBs

Aluminum or copper base 1.5-3.0mm for direct heat sinking. Dielectric thermal conductivity 1-3 W/m·K vs. 0.3 W/m·K for FR-4. For LED drivers, DC-DC converters, and motor controller power stages.

1500VDC

Solar Inverter PCBs

1500V system voltage designs. CTI ≥600V laminate for 1000VDC+ bus. 4kV HiPot between primary and secondary. Conformal coating for outdoor/desert installation. 25-year design life.

1000VDC

BESS Power Boards

Battery management system (BMS) with precision voltage sensing (±0.1%). 1000VDC bus isolation. Daisy-chain or isoSPI interconnects for stackable modules. UL 1973 / IEC 62619 compliant.

Up to 32L

Hybrid Stackups

Power layers at 6-10oz copper, signal layers at 1-2oz, all in single lamination. IMS (Insulated Metal Substrate) for direct-bonded power devices. Via aspect ratio 8:1 maintained on heavy copper layers.

EV Charger Power Stage

350kW Through a PCB.
This Is Power Electronics.

A 350kW DC fast charger delivers 500A at 800V through the PCB. At 97% efficiency, that's 10.5kW of heat to dissipate. The PCB is simultaneously a current bus, a heat spreader, a high-voltage isolator, and a precision gate-drive signal router. Every function must coexist without compromise.

  • 10-12oz outer layers for power path, 500A continuous with <30°C rise. 50mm-wide trace at 12oz (420µm) carries 500A with ~25°C rise. Integrated into PCB — no external busbar
  • SiC/GaN gate drive with <2nH loop inductance, Kelvin-source connection, gate resistor integrated into PCB trace. Switching 800V at 50kHz with dv/dt >50V/ns. Controlled EMI through tight gate-drive loop layout
  • Embedded copper coin under SiC modules, 3mm solid copper, <0.2°C/W Rth(j-pcb). For Wolfspeed 1200V/600A or Infineon CoolSiC half-bridge modules
  • DC link capacitor integration . Low-ESL planar bus structure with laminated copper layers and thin dielectric. <5nH total loop inductance from DC link to SiC module
EV charger power stage PCB with heavy copper and SiC modules

Solar & Storage

25 Years on a Rooftop.
Design for the Long Haul.

A solar microinverter under a panel in Arizona cycles from -20°C to +85°C every day for 25 years. That's 9,125 thermal cycles. Every solder joint, every laminate interface, every conformal coating bond must survive without degradation. Design margin isn't optional, it's the difference between a 2-year warranty claim and a 25-year revenue stream.

  • 1500VDC string inverter power stage, CTI ≥600V laminate. 8mm creepage at 1500V per IEC 60664 Pollution Degree 2. Isolation slots between high-voltage and low-voltage domains
  • Thermal cycling qualified laminate, -40°C to +125°C, 1000 cycles. Cross-section analysis at 0/250/500/1000 cycles. No delamination, no barrel cracking, no CAF growth beyond 50µm
  • Conformal coating for outdoor exposure . Silicone or parylene for UV, moisture, and salt spray. Applied post-assembly with masked connectors. Re-workable: local removal, repair, re-coat without stripping entire board
  • BMS precision analog front-end, ±0.1% voltage sensing across 16-series cells. Guard rings and Kelvin connections for leakage current <100nA. IsoSPI or transformer-isolated daisy-chain for stackable battery modules
Solar inverter and BESS power electronics PCB

New Energy Applications & Requirements

ApplicationKey PCB DemandsHuaxing SolutionQuality
DC Fast Charger (350kW)12oz copper, SiC gate drive, <2nH loop L, embedded coin10-12oz, 4kV HiPot, copper coin, planar DC busIPC Class 2+
On-Board Charger (OBC)6-11kW, compact, high-Tg, automotive qualified6-10oz hybrid, high-Tg FR-4, metal-core optionIPC Class 2+
String Inverter (1500VDC)HV isolation, outdoor rated, 25yr life, thermal cyclingCTI ≥600V, 8mm creepage, conformal coating, polyimideIPC Class 2+
Microinverter / OptimizerCompact, under-panel rated, -40 to +85°C, 25yr lifeMetal-core, high-Tg, conformal coating, 1000+ cyclesIPC Class 2+
Battery BMS (Residential)Precision analog, isolation, 16S LiFePO4/NMC6-8L, guard rings, isoSPI, ±0.1% voltage senseIPC Class 2+
Wind Power ConverterHeavy copper, IGBT power stage, HV, harsh environment10-12oz, 4kV HiPot, polyimide, embedded coin, 32LIPC Class 3

Thermal Design & Reliability

10.5kW of Heat on a 200×150mm Board.
Thermal Design Isn't Optional.

A 350kW EV charger power stage dissipates 10.5kW at 97% efficiency on a PCB the size of a tablet. Without engineered thermal management, junction temperatures exceed 175°C in under 60 seconds. Every design decision, copper weight, via placement, dielectric thickness, baseplate material, is a thermal decision. Our thermal team runs CFD simulation before fabrication, not as a post-mortem when boards come back from the field.

  • Embedded copper coin technology, 3-5mm solid copper inserts pressed into the PCB under each power module. Thermal resistance <0.2°C/W junction-to-heatsink. For Wolfspeed XM3, Infineon EconoDUAL, and onsemi Q1/Q2 pack SiC modules. Eliminates thermal vias through thin dielectric — direct metal path to heatsink
  • Metal-core PCB for mid-power stages, 1.5-3.0mm aluminum or copper baseplate with thermally conductive dielectric (1-3 W/m·K vs 0.3 W/m·K for FR-4). For DC-DC converters, OBC power stages, and motor inverter gate drivers. Single-layer power circuit bonded directly to heatsink substrate
  • Thermal via farms with aspect ratio optimization, 0.3mm vias at 0.8mm pitch under exposed pads. Filled and capped for via-in-pad. Aspect ratio maintained below 8:1 for reliable plating on heavy copper layers. CFD-validated, not just "fill the pad with vias and hope"
  • Conformal coating for harsh environments, Silicone (SR) for high-temperature solar/outdoor, parylene for precision analog BMS boards, acrylic (AR) for general moisture protection. Applied post-assembly with masked connectors and test points. Documented rework procedure with HiPot re-verification after local re-coating
Thermal management and heavy copper PCB for power electronics

New Energy PCB Production Flow

01

Power DFM Review

Heavy copper etch analysis. Creepage/clearance audit per IEC 60664. Thermal via optimization.

02

Heavy Copper Fab

Copper-weight-optimized etching. High-Tg or polyimide lamination. Hybrid stackup bonding.

03

SMT & Power Assembly

IGBT/SiC module placement. Heavy copper thermal profiling. SPI → AOI → X-Ray on 100%.

04

HiPot & Reliability

4kV HiPot on 100%. Thermal cycling -40/+125°C sample testing. Partial discharge screening.

05

Coated & Shipped

Conformal coating for outdoor products. Final HiPot verification. 99.2% on-time delivery.

Power Electronics Manufacturing

New Energy PCB Buyer's Checklist

1

"Show me thermal cycling data for your heavy-copper laminate, 1000 cycles, -40/+125°C."

Heavy copper (10-12oz) has different CTE mismatch behavior than standard 1oz. Cross-sections at 0, 250, 500, 1000 cycles. No delamination, no barrel cracks, no CAF growth. If they don't have this data, they haven't qualified heavy-copper reliability.

2

"How do you verify HiPot isolation at 4kV on production boards?"

HiPot test on 100% of boards, not sample, not "design verification." 4kV DC for 1 second, leakage <1mA. Isolation slots post-routing washed and inspected before HiPot. Ask for test data from a recent order.

3

"What's your process for conformal coating with rework access?"

Some components need rework access. Masked connectors, peelable solder mask over test points. Documented re-coating procedure after rework with HiPot re-verification. Not "spray the whole board and hope nothing fails."

4

"How do you handle DC link capacitor integration in heavy-copper designs?"

Laminated planar bus structure with thin dielectric for low ESL. <5nH total loop inductance from DC link to switching node. Critical for SiC/GaN with >50V/ns dv/dt. Ask for partial discharge test data.

5

"What happens when the SiC MOSFET you qualified goes EOL, do you have an alternate source strategy?"

SiC and GaN semiconductors have fewer second-source options than silicon IGBTs. A single Wolfspeed or Infineon part going EOL can halt production for months. Ask about: pre-qualified alternates for every power semiconductor in your BOM, die-level compatibility verification (not just package, gate threshold voltage range, Rds(on), gate charge), and buffer stock program for sole-source SiC parts with 6-month lead time cushion.

6

"Show me your partial discharge data at 1.5× rated voltage for high-voltage designs."

1500VDC solar inverter and 1000VDC BESS boards must pass partial discharge testing per IEC 60270. PD inception voltage ≥1.5× rated operating voltage, extinction voltage ≥1.25×. Discharge magnitude <10pC at test voltage — any higher and there's a void or delamination that will grow over 25 years of thermal cycling. This is NOT the same as HiPot — HiPot finds gross isolation failures; PD finds latent defects that HiPot misses and that fail after 5-8 years in the field.

Certifications & Compliance

ISO 9001 →:2015
ISO 14001:2015
UL E354321
IPC-A-610 Class 2/3
IPC-6012 Class 3
ANSI/ESD S20.20
IEC 60664 Compliant
RoHS 3.0 / REACH

Power the Future. Start With Your PCB.

Send us your power stage schematic, voltage/current requirements, and thermal budget. We'll respond within 24 hours with a DFM analysis covering heavy copper feasibility, HiPot isolation strategy, thermal management, and enclosure integration. From a manufacturer that builds power electronics PCBs daily.