Solder paste printing is the single largest source of SMT defects. Industry defect studies consistently attribute roughly 60–70% of assembly defects to the printing step — not the placement machine, not the oven. Yet most purchase orders specify the stencil thickness and nothing else. The result is that paste volume drifts inside a window nobody defined, and the defects appear three process steps later where they are far more expensive to fix.
Solder Paste Inspection (SPI) exists to break that chain. It measures the deposit in three dimensions immediately after printing, comparing each pad against a reference, and it produces the one metric that tells you whether the line is actually stable: the process capability index. This guide covers what to specify, what numbers to demand, and how to read the SPI reports a supplier sends you. Huaxing PCBA runs SPI as standard on all 8 SMT lines, ahead of AOI, so that paste problems are contained at the printer.
What SPI Actually Measures
SPI is a laser or phase-shift 3D measurement system positioned directly after the printer. For every pad in the program it captures four numbers, and each one points at a different failure mode.
Volume — the primary control variable
Volume is computed from the full 3D height map, not from area alone. It is expressed as a percentage of the nominal volume the stencil aperture should have deposited (aperture area × stencil thickness). Volume is the metric with the strongest correlation to solder joint quality, because a joint needs a minimum amount of alloy to form a reliable fillet. Typical acceptance is 80–120% of nominal, with tighter windows for fine-pitch and BGA pads.
Height — your stencil and squeegee health check
Paste height should sit close to the stencil thickness. If the mean height across a panel drifts consistently low, the cause is usually stencil wear, insufficient squeegee pressure, or paste that has thickened. If height runs high on one side of the board only, look at squeegee parallelism. Height is also a leading indicator of bridging risk on fine-pitch parts.
Area and offset — registration to the pad
Area covers smear and missing deposits; offset measures how far the deposit sits off pad centre. Offset above roughly 25% of the pad width is enough to cause tombstoning on chip components and opens on fine-pitch leads. Offset trending in one direction across the panel points at stencil-to-board registration rather than a paste problem.
Shape and bridging detection
Modern SPI programs flag deposits that merge between adjacent apertures, which predicts bridging before reflow rather than after. This is why SPI is more valuable than post-reflow inspection for fine-pitch work: the board is still cleanable at this point. The AOI, X-ray and SPI comparison guide covers how the three inspection stages divide the work.
Key Takeaway: SPI is only useful if the limits are stated before production. Define volume, height, area and offset acceptance in the fabrication/assembly specification, and require the SPI program and its limits to be submitted for approval alongside the stencil design.
Transfer Efficiency: The Number That Explains Most Paste Problems
Transfer efficiency is the ratio of paste volume actually deposited to the theoretical aperture volume. It sits behind almost every paste-volume complaint, and it is governed by the aperture geometry — not by the paste itself, as long as the paste is fresh and stored correctly.
The controlling relationship is the area ratio: aperture area divided by aperture wall area. When that ratio falls below 0.66, paste releases poorly from the aperture walls and transfer efficiency drops sharply. The universal practice of holding area ratio at or above 0.66 comes directly from this physics. For very small apertures, the practical lever is thinner stencil material rather than a larger aperture.
| Aperture Feature | Typical Area Ratio | Expected Transfer Efficiency | Practical Consequence |
|---|---|---|---|
| 0402 / 0201 chip pads | 0.70 – 0.85 | 85 – 100% | Stable, wide process window |
| 0.5 mm pitch QFP | 0.66 – 0.75 | 75 – 90% | Requires clean stencil and correct squeegee |
| 0.4 mm pitch QFN | 0.60 – 0.70 | 65 – 85% | Nano-coating or step stencil strongly advised |
| 0.3 mm pitch / micro-BGA | < 0.60 | 50 – 75% | Thinner foil, electroformed stencil, tightest SPI limits |
Two manufacturing decisions follow from this table. First, the stencil must be matched to the finest feature on the board — specifying a single thickness across a mixed-technology panel guarantees poor transfer on the small pads. Second, the stencil surface treatment matters at fine pitch: a nano-coating on the aperture walls reduces paste adhesion and recovers several percentage points of transfer efficiency. The SMT stencil design guide covers aperture reduction rules and foil selection in detail.
Setting Cpk Targets: What "In Control" Means in Writing
Two lines can both pass a volume check on one panel and behave completely differently over a production run. The difference is capability, and that is what Cpk measures. Cpk compares the distance from your process mean to the nearest specification limit against three standard deviations of your process spread.
Cpk 1.33 — the standard commercial requirement
A Cpk of 1.33 corresponds to roughly 32 defects per million opportunities if the process stays centred. This is the level most OEM quality agreements name for SMT paste printing, and it is a reasonable floor for general commercial electronics. Demand the SPI data, not just the claim: capability is calculated over a minimum of 30 consecutive boards and should be reported per aperture class, not averaged across the whole panel.
Cpk 1.67 — automotive and medical
IATF 16949 and medical device programmes typically require Cpk ≥ 1.67 for critical characteristics, which is roughly 0.6 defects per million. On paste printing this demands more than a good printer: it requires closed-loop control where the SPI result automatically adjusts the printer parameters, and it requires the stencil to be replaced on a defined print-count schedule rather than on visible wear.
Cpk 2.00 — what a mature line actually holds
A well-controlled line with closed-loop SPI feedback and 0201-and-up components will often hold Cpk above 2.0 on volume across a stable product mix. If a supplier reports Cpk well below 1.33 and blames the paste, be sceptical: paste is a controlled input, and poor capability usually traces to stencil condition, printer setup repeatability, or support tooling rather than the material.
Procurement tip: Put the requirement in the quality agreement as "solder paste volume Cpk ≥ 1.33 (commercial) / ≥ 1.67 (automotive) calculated per aperture class from SPI data on a minimum of 30 consecutive boards per product, reported monthly." Vague commitments to "process control" cannot be audited; a Cpk target can.
What to Look For in the SPI Report
When a contract manufacturer sends SPI data, three things separate a real control system from a screenshot taken for the customer.
Sampling frequency, stated explicitly
Full inspection of every board gives the most data; sampling of the first n boards per shift plus periodic checks is common at high volume. Either is defensible — what is not defensible is an unstated rate. Ask how many boards per lot were measured and whether the sample is continuous or front-loaded.
Data split by aperture class
A single board-wide mean hides the failure that matters. Fine-pitch apertures degrade first, and a panel average that includes large connector pads will look healthy while the 0.4 mm QFN pads are running at 70% transfer efficiency. The report should segment at minimum into chip components, fine-pitch leaded, and area-array pads.
Corrective action when limits are exceeded
A report that shows an out-of-limit result with no disposition is worse than no report. The expected response is documented: wipe or clean the stencil, re-inspect, and if the deviation repeats, replace the stencil or re-profile the printer. Reviewing the DPPM and quality metric benchmarks will help you calibrate whether the reported numbers are competitive.
Where Paste Control Fits in the Wider Assembly Flow
Paste volume control is one node in a chain that also includes stencil design, reflow profiling and inspection strategy. Optimising it in isolation produces diminishing returns, because a correctly printed deposit can still be ruined by a profile that ramps too fast or a placement machine that misplaces the part. The practical sequence that holds yield is: define paste limits and Cpk targets, verify with SPI, control reflow with a documented profile, and confirm with AOI and X-ray.
Two adjacent topics are worth reading alongside this one. Reflow profile optimisation covers how the thermal profile affects voiding and fillet formation once the paste is correctly deposited, and the solder paste selection guide explains how alloy choice and powder size interact with the aperture sizes discussed above. For lines balancing throughput against defect rate, the SMT line capacity and throughput planning guide shows where inspection adds cycle time and where it does not.
Summary / Next Steps
Solder paste volume is a measurable, controllable input, and SPI is the instrument that makes it visible. The three actions that follow from this are straightforward: specify transfer efficiency and volume limits in the assembly drawing; require a Cpk target with monthly SPI data segmented by aperture class; and demand a documented corrective action when limits are exceeded. Buyers who write those three clauses into their agreements get a line that stays in control instead of a line that passes first article and drifts afterward.
At Huaxing PCBA, SPI runs inline on all 8 SMT lines ahead of AOI and X-ray, covering components down to 0201 and 0.3 mm pitch BGA, with IATF 16949 and ISO 9001 certification behind the measurement systems. We will send the SPI program setup, sampling plan and Cpk history for your product with the first article inspection package. Send your Gerber and BOM for a DFM review and a manufacturing plan within 24 hours.
